1. Technical Field
The present disclosure relates to a semiconductor package, a semiconductor apparatus and a method for manufacturing the semiconductor package.
2. Description of the Related Art
In the related art, a semiconductor package including a semiconductor chip and a resin layer that covers the semiconductor chip has been used.
As an example of such a semiconductor package, a structure has been proposed in which an active surface (circuit forming surface) and a side surface of a semiconductor chip are covered by an insulating layer and a wiring structure electrically connected to the semiconductor chip is formed on the insulating layer (for example, see JP-A-2011-119502 and JP-A-2008-300854).
As a method for manufacturing such a semiconductor package, the following method has been proposed.
For example, a support substrate is prepared, and a semiconductor chip is mounted on the support substrate such that a surface of the semiconductor chip opposite to an active surface thereof is in contact with a front surface of the support substrate. Then, the mounted semiconductor chip is encapsulated by an insulating layer, and a wiring layer and an interlayer insulating layer are formed on the insulating layer to form a wiring structure. Then, the support substrate is removed. The semiconductor package is thus manufactured.
In the related-art manufacturing process of the semiconductor package, in a state where the semiconductor chip is fixed on the support substrate and the insulating layer and the wiring structure are formed, stiffness of the support substrate is high, and thus, warpage hardly occurs in the semiconductor package. However, if the support substrate is removed, stress in a portion where the support substrate is removed is released. Thus, warpage occurs in the semiconductor package due to the stress release.